Invention Grant
- Patent Title: Semiconductor interconnection structure and methods of forming the same
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Application No.: US17346209Application Date: 2021-06-12
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Publication No.: US11854963B2Publication Date: 2023-12-26
- Inventor: Shao-Kuan Lee , Kuang-Wei Yang , Cherng-Shiaw Tsai , Cheng-Chin Lee , Ting-Ya Lo , Chi-Lin Teng , Hsin-Yen Huang , Hsiao-Kang Chang , Shau-Lin Shue
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee Address: TW Hsinchu
- Agency: NZ CARR LAW OFFICE
- Main IPC: H01L23/522
- IPC: H01L23/522 ; H01L23/532 ; H01L21/768 ; H01L23/528

Abstract:
An interconnect structure includes a dielectric layer, a first conductive feature, a hard mask layer, a conductive layer, and a capping layer. The first conductive feature is disposed in the dielectric layer. The hard mask layer is disposed on the first conductive feature. The conductive layer includes a first portion and a second portion, the first portion of the conductive layer is disposed over at least a first portion of the hard mask layer, and the second portion of the conductive layer is disposed over the dielectric layer. The hard mask layer and the conductive layer are formed by different materials. The capping layer is disposed on the dielectric layer and the conductive layer.
Public/Granted literature
- US20220285268A1 SEMICONDUCTOR INTERCONNECTION STRUCTURE AND METHODS OF FORMING THE SAME Public/Granted day:2022-09-08
Information query
IPC分类: