Invention Grant
- Patent Title: Semiconductor package and manufacturing method thereof
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Application No.: US16805856Application Date: 2020-03-02
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Publication No.: US11854984B2Publication Date: 2023-12-26
- Inventor: Chen-Hsuan Tsai , Chin-Chuan Chang , Szu-Wei Lu , Tsung-Fu Tsai
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: JCIPRNET
- Main IPC: H01L23/538
- IPC: H01L23/538 ; H01L21/48 ; H01L21/56 ; H01L23/31 ; H01L23/498 ; H01L23/00 ; H01L25/065 ; H01L25/00 ; H01L25/10 ; H01L25/16 ; H01L23/522 ; H01L21/683

Abstract:
A semiconductor package includes a first semiconductor die, a second semiconductor die, a semiconductor bridge, an integrated passive device, a first redistribution layer, and connective terminals. The second semiconductor die is disposed beside the first semiconductor die. The semiconductor bridge electrically connects the first semiconductor die with the second semiconductor die. The integrated passive device is electrically connected to the first semiconductor die. The first redistribution layer is disposed over the semiconductor bridge. The connective terminals are disposed on the first redistribution layer, on an opposite side with respect to the semiconductor bridge. The first redistribution layer is interposed between the integrated passive device and the connective terminals.
Public/Granted literature
- US20210091005A1 SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF Public/Granted day:2021-03-25
Information query
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