- Patent Title: Buffer to reduce write amplification of misaligned write operations
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Application No.: US16712703Application Date: 2019-12-12
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Publication No.: US11861219B2Publication Date: 2024-01-02
- Inventor: Peng Li , Jawad B. Khan , Sanjeev N. Trika
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Compass IP Law PC
- Main IPC: G06F3/06
- IPC: G06F3/06

Abstract:
Examples herein relate to a storage system that separately handles portions of a write operation that are aligned and misaligned with respect to retrievable segments from a storage device. For misaligned portions, a buffer can be used to store misaligned retrievable segments and update the segments with content provided with the write operation. Aligned portions of content associated with a write request can be written directly to the storage medium or overwrite corresponding retrievable segments present in the buffer. A table or array can track logical block addresses that correspond to content in the buffer or in the storage. Content in the buffer can be kept in the buffer without being backed-up or persisted to the storage until a triggering event occurs such as power loss or low space in the buffer.
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