A method for manufacturing an integrated circuit device is provided. The method includes forming first, second, and third semiconductor fins over a semiconductor substrate, in which the second semiconductor fin is between the first and third semiconductor fins; forming first and second fin sidewall spacers respectively on a sidewall of a first portion of the first semiconductor fin and a sidewall of a first portion of the second semiconductor fin, wherein the first and second fin sidewall spacers are between the first and second semiconductor fins; recessing the first portions of the first and second semiconductor fins and a first portion of the third semiconductor fin; and forming first to third epitaxial features respectively on the recessed portions of the first to third semiconductor fins, wherein the second epitaxial feature is spaced apart from the first epitaxial feature and merged with the third epitaxial feature.