Invention Grant
- Patent Title: Integrated circuit conductive line arrangement for circuit structures, and method
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Application No.: US17459756Application Date: 2021-08-27
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Publication No.: US11862562B2Publication Date: 2024-01-02
- Inventor: Chih-Yu Lai , Hui-Zhong Zhuang , Chih-Liang Chen , Li-Chun Tien
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Hauptman Ham, LLP
- Main IPC: H01L23/528
- IPC: H01L23/528 ; H01L29/417 ; H01L21/8238 ; H01L23/522 ; H01L27/092 ; H01L23/552

Abstract:
A circuit structure includes a substrate that includes a first transistor stack over the substrate that includes: a first transistor where the first transistor is a first conductivity type; and a second transistor, above the first transistor, where the second transistor is a second conductivity type different from the first conductivity type. The structure also includes a plurality of first conductive lines in a first metal layer above the first transistor stack, the plurality of first conductive lines electrically connected to the first transistor stack. The structure also includes a plurality of second conductive lines in a second metal layer below the substrate and underneath the first transistor stack, the plurality of second conductive lines electrically connected to the first transistor stack. The plurality of first conductive lines are configured asymmetrically with respect to the plurality of second conductive lines.
Public/Granted literature
- US20230062140A1 INTEGRATED CIRCUIT CONDUCTIVE LINE ARRANGEMENT FOR CIRCUIT STRUCTURES, AND METHOD Public/Granted day:2023-03-02
Information query
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