Invention Grant
- Patent Title: Vertical transistor including symmetrical source/drain extension junctions
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Application No.: US17569669Application Date: 2022-01-06
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Publication No.: US11862710B2Publication Date: 2024-01-02
- Inventor: Chun-Chen Yeh , Alexander Reznicek , Veeraraghavan Basker , Junli Wang
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: CANTOR COLBURN LLP
- Agent Daniel Yeates
- The original application number of the division: US16797097 2020.02.21
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L29/78 ; H01L21/223 ; H01L29/06

Abstract:
A semiconductor device includes a first source/drain region on an upper surface of a semiconductor substrate that extends along a first direction to define a length and a second direction opposite the first direction to define a width. A channel region extends vertically in a direction perpendicular to the first and second directions from a first end contacting the first source/drain region to an opposing second end contacting a second source/drain region. A gate surrounds a channel portion of the channel region, and a first doped source/drain extension region is located between the first source/drain region and the channel portion. The first doped source/drain extension region has a thickness extending along the vertical direction. A second doped source/drain extension region is located between the second source/drain region and the channel portion. The second doped source/drain extension region has a thickness extending along the vertical direction that matches the first thickness.
Public/Granted literature
- US20220130980A1 VERTICAL TRANSISTOR INCLUDING SYMMETRICAL SOURCE/DRAIN EXTENSION JUNCTIONS Public/Granted day:2022-04-28
Information query
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