Invention Grant
- Patent Title: Wafer level methods of testing semiconductor devices using internally-generated test enable signals
-
Application No.: US17872440Application Date: 2022-07-25
-
Publication No.: US11867751B2Publication Date: 2024-01-09
- Inventor: Ahn Choi , Reum Oh
- Applicant: Samsung Electronics Co., Ltd.
- Applicant Address: KR Suwon-si
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Suwon-si
- Agency: Myers Bigel, P.A.
- Priority: KR 20190059130 2019.05.20
- Main IPC: G01R31/28
- IPC: G01R31/28 ; G01R31/3185 ; G01R31/317

Abstract:
A wafer-level method of testing an integrated circuit (IC) device includes: (i) applying a plurality of test operation signals to a wafer containing the IC device, (ii) generating a test enable signal in response to detecting, on the wafer, a toggling of at least one of the plurality of test operation signals, and then (iii) testing at least a portion of the IC device in response to the generating the test enable signal. The generating may also include generating a test enable signal in response to detecting, on the wafer, an inactive-to-active transition of a toggle detection signal.
Public/Granted literature
- US20220357393A1 WAFER LEVEL METHODS OF TESTING SEMICONDUCTOR DEVICES USING INTERNALLY-GENERATED TEST ENABLE SIGNALS Public/Granted day:2022-11-10
Information query