Invention Grant
- Patent Title: Memory performance using memory access command queues in memory devices
-
Application No.: US17411572Application Date: 2021-08-25
-
Publication No.: US11868655B2Publication Date: 2024-01-09
- Inventor: Sundararajan N. Sankaranarayanan
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: LOWENSTEIN SANDLER LLP
- Main IPC: G06F3/06
- IPC: G06F3/06

Abstract:
Systems and methods are disclosed including a processing device operatively coupled to memory device. The processing device perform operations comprising receiving a memory access command; determining a physical address associated with the memory access command; determining a plane of a die on the memory device that is referenced by the physical address; inserting the memory access command into a queue associated with the plane; and processing the memory access command from the queue.
Public/Granted literature
- US20230068605A1 MEMORY PERFORMANCE USING MEMORY ACCESS COMMAND QUEUES IN MEMORY DEVICES Public/Granted day:2023-03-02
Information query