Invention Grant
- Patent Title: Seed layer for ferroelectric memory device and manufacturing method thereof
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Application No.: US17709284Application Date: 2022-03-30
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Publication No.: US11869766B2Publication Date: 2024-01-09
- Inventor: Chun-Chieh Lu , Sai-Hooi Yeong , Yu-Ming Lin
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
- Current Assignee Address: TW Hsinchu
- Agency: WPAT LAW
- Agent Anthony King
- Main IPC: H01L21/02
- IPC: H01L21/02 ; H10B51/30

Abstract:
A method includes: providing a bottom layer; forming a first transistor over a substrate; forming a bottom electrode over the transistor; depositing a first seed layer over the bottom electrode; performing a surface treatment on the first seed layer, wherein after the surface treatment the first seed layer includes at least one of a tetragonal crystal phase and an orthorhombic crystal phase; depositing a dielectric layer over the bottom layer adjacent to the first seed layer, the dielectric layer including an amorphous crystal phase; depositing an upper layer over the dielectric layer; performing a thermal operation on the dielectric layer to thereby convert the dielectric layer into a ferroelectric layer.
Public/Granted literature
- US20220223413A1 SEED LAYER FOR FERROELECTRIC MEMORY DEVICE AND MANUFACTURING METHOD THEREOF Public/Granted day:2022-07-14
Information query
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