Invention Grant
- Patent Title: Interposer routing structure and semiconductor package
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Application No.: US18312599Application Date: 2023-05-05
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Publication No.: US11869846B1Publication Date: 2024-01-09
- Inventor: Sheng-Fan Yang , Hao-Yu Tung , Hung-Yi Chang , Wei-Chiao Wang , Yi-Tzeng Lin
- Applicant: GLOBAL UNICHIP CORPORATION , TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Applicant Address: TW Hsinchu
- Assignee: GLOBAL UNICHIP CORPORATION,TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee: GLOBAL UNICHIP CORPORATION,TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee Address: TW Hsinchu; TW Hsinchu
- Agency: CKC & Partners Co., LLC
- Priority: TW 2100517 2023.01.06
- Main IPC: H01L23/538
- IPC: H01L23/538 ; H01L25/18 ; H10B80/00 ; H01L23/00 ; H01L25/065

Abstract:
An interposer routing structure includes a first trace layer, a bump layer, a second trace layer and a third trace layer. The first trace layer is configured to receive a power. The bump layer is coupled to a die. The second trace layer and the third trace layer are coupled between the first trace layer and the bump layer, and include multiple ground traces and multiple power traces. The ground traces are located on both sides of at least one of the power traces, so that the ground traces isolate the at least one power trace and multiple signal traces. The power traces of the second trace layer are coupled to each other by a connecting power trace, and the ground traces of the third trace layer are coupled to each other by a connecting ground trace.
Information query
IPC分类: