Invention Grant
- Patent Title: Method of manufacturing semiconductor device
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Application No.: US17279830Application Date: 2019-09-19
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Publication No.: US11869927B2Publication Date: 2024-01-09
- Inventor: Yumiko Kawano , Genji Nakamura , Philippe Gaubert , Hajime Nakabayashi
- Applicant: Tokyo Electron Limited
- Applicant Address: JP Tokyo
- Assignee: Tokyo Electron Limited
- Current Assignee: Tokyo Electron Limited
- Current Assignee Address: JP Tokyo
- Agency: Armstrong Teasdale LLP
- Priority: JP 18183304 2018.09.28
- International Application: PCT/JP2019/036690 2019.09.19
- International Announcement: WO2020/066819A 2020.04.02
- Date entered country: 2021-03-25
- Main IPC: H01L21/02
- IPC: H01L21/02 ; H01L49/02

Abstract:
A method of manufacturing a semiconductor device includes a first laminating step, a second laminating step, a third laminating step, a first annealing step, and a fourth laminating step. In the first laminating step, a first electrode film is laminated on a substrate. In the second laminating step, a capacitive insulator is laminated on the first electrode film. In the third laminating step, a metal oxide is laminated on the capacitive insulator. In the first annealing step, the first electrode film, the capacitive insulator, and the metal oxide, which are laminated on the substrate, are annealed. In the fourth laminating step, a second electrode film is laminated on the annealed metal oxide. The capacitive insulator is an oxide that contains at least one of zirconium and hafnium, and the metal oxide is an oxide that contains at least one of tungsten, molybdenum, and vanadium.
Public/Granted literature
- US20210399085A1 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE Public/Granted day:2021-12-23
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