Invention Grant
- Patent Title: Vertical bipolar junction transistor and method
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Application No.: US17679166Application Date: 2022-02-24
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Publication No.: US11869941B2Publication Date: 2024-01-09
- Inventor: Sarah A. McTaggart , Rajendran Krishnasamy , Qizhi Liu
- Applicant: GlobalFoundries U.S. Inc.
- Applicant Address: US NY Malta
- Assignee: GlobalFoundries U.S. Inc.
- Current Assignee: GlobalFoundries U.S. Inc.
- Current Assignee Address: US NY Malta
- Agency: Hoffman Warnick LLC
- Agent Francois Pagette
- Main IPC: H01L21/265
- IPC: H01L21/265 ; H01L29/732 ; H01L29/737 ; H01L29/08 ; H01L29/66

Abstract:
Disclosed are a structure including a transistor and a method of forming the structure. The transistor includes an emitter region with first and second emitter portions. The first emitter portion extends through a dielectric layer. The second emitter portion is on the first emitter portion and the top of the dielectric layer. An additional dielectric layer covers the top of the second emitter portion. The second emitter portion and the dielectric and additional dielectric layers are wider than the first emitter portion. At least a section of the second emitter portion is narrower than the dielectric and additional dielectric layers, thereby creating cavities positioned vertically between edge portions of the dielectric and additional dielectric layers and positioned laterally adjacent to the second emitter portion. The cavities are filled with dielectric material or dielectric material blocks the side openings to the cavities creating pockets of air, of gas or under vacuum.
Public/Granted literature
- US20230268394A1 VERTICAL BIPOLAR JUNCTION TRANSISTOR AND METHOD Public/Granted day:2023-08-24
Information query
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