Invention Grant
- Patent Title: Power semiconductor device with reduced strain
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Application No.: US17177641Application Date: 2021-02-17
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Publication No.: US11869948B2Publication Date: 2024-01-09
- Inventor: Daniel Jenner Lichtenwalner , Edward Robert Van Brunt , Thomas E. Harrington, III , Shadi Sabri , Brett Hull , Brice McPherson , Joe W. McPherson
- Applicant: Wolfspeed, Inc.
- Applicant Address: US NC Durham
- Assignee: Wolfspeed, Inc.
- Current Assignee: Wolfspeed, Inc.
- Current Assignee Address: US NC Durham
- Agency: Myers Bigel, P.A.
- Main IPC: H01L29/40
- IPC: H01L29/40 ; H01L29/16
Abstract:
Strategic placement and patterning of electrodes, vias, and metal runners can significantly reduce strain in a power semiconductor die. By modifying the path defining electrodes, vias, and metal runners, as well as patterning the material layers thereof, strain can be better managed to increase reliability of a power semiconductor die.
Public/Granted literature
- US20220262909A1 POWER SEMICONDUCTOR DEVICE WITH REDUCED STRAIN Public/Granted day:2022-08-18
Information query
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