Invention Grant
- Patent Title: Failsafe input/output electrostatic discharge protection with diodes
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Application No.: US17484086Application Date: 2021-09-24
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Publication No.: US11870247B2Publication Date: 2024-01-09
- Inventor: Tzu-Heng Chang , Hsin-Yu Chen
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Jones Day
- Main IPC: H02H9/04
- IPC: H02H9/04 ; H01L27/02

Abstract:
Systems and methods are provided for fail-safe protection of circuitry from electrostatic discharge due through input and output connections. The power circuitry may include a string of diodes, connections to power lines, and particular diodes for voltage pull-up and pull-down clamping. There may be both a pull-up third diode in the diode string for connection between I/O and VDD and a pull-down third diode between I/O and VSS. During an ESD event the ESD device is configured to hold voltage from exceeding a threshold voltage and damaging internal circuitry. During operational mode the ESD device is turned off and does not interfere with circuit operations.
Public/Granted literature
- US20220294211A1 Failsafe Input/Output Electrostatic Discharge Protection With Diodes Public/Granted day:2022-09-15
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