Invention Grant
- Patent Title: Wiring substrate
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Application No.: US17488373Application Date: 2021-09-29
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Publication No.: US11871515B2Publication Date: 2024-01-09
- Inventor: Yasuki Kimishima , Satoru Kawai
- Applicant: IBIDEN CO., LTD.
- Applicant Address: JP Gifu
- Assignee: IBIDEN CO., LTD.
- Current Assignee: IBIDEN CO., LTD.
- Current Assignee Address: JP Ogaki
- Agency: Oblon, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP 20165374 2020.09.30
- Main IPC: H05K1/11
- IPC: H05K1/11 ; H05K1/16 ; H05K1/02

Abstract:
A wiring substrate includes an insulating layer having a through hole, a first conductor layer formed on a first surface of the insulating layer, a second conductor layer formed on a second surface of the insulating layer, an interlayer connection conductor formed in the through hole such that the interlayer connection conductor is connecting the first and second conductor layers, and a resin body formed in the through hole of the insulating layer such that a volume occupancy rate of the resin body is in a range of 30% to 55% in the through hole. The interlayer connection conductor is formed such that the interlayer connection conductor has a length in a range of 1000 μm to 2000 μm in a thickness direction of the insulating layer and that a volume occupancy rate of the interlayer connection conductor is in a range of 45% to 70% in the through hole.
Public/Granted literature
- US20220104353A1 WIRING SUBSTRATE Public/Granted day:2022-03-31
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