Invention Grant
- Patent Title: Semiconductor memory device having ferroelectric gate insulating layer
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Application No.: US17447352Application Date: 2021-09-10
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Publication No.: US11871579B2Publication Date: 2024-01-09
- Inventor: Kunifumi Suzuki , Yuuichi Kamimuta
- Applicant: Kioxia Corporation
- Applicant Address: JP Tokyo
- Assignee: Kioxia Corporation
- Current Assignee: Kioxia Corporation
- Current Assignee Address: JP Tokyo
- Agency: Oblon, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP 21046295 2021.03.19
- Main IPC: H10B51/20
- IPC: H10B51/20 ; H01L29/51 ; H10B43/20 ; H10B51/30 ; H10B43/30

Abstract:
A semiconductor memory device of an embodiment includes: a semiconductor layer extending in a first direction; a first gate electrode layer; a second gate electrode layer provided apart from the first gate electrode layer in the first direction; and a gate insulating layer containing oxygen and at least one metal element of hafnium or zirconium, the gate insulating layer including a first region between the first gate electrode layer and the semiconductor layer, a second region between the first gate electrode layer and the second gate electrode layer, and a third region between the second gate electrode layer and the semiconductor layer, the first region including a crystal of an orthorhombic crystal system or a trigonal crystal system as a main constituent substance, and a distance between the second region and the semiconductor layer being larger than a distance between the first region and the semiconductor layer.
Public/Granted literature
- US20220302170A1 SEMICONDUCTOR MEMORY DEVICE Public/Granted day:2022-09-22
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