Invention Grant
- Patent Title: Command prioritization techniques for reducing latency in a memory system
-
Application No.: US17457202Application Date: 2021-12-01
-
Publication No.: US11886740B2Publication Date: 2024-01-30
- Inventor: Christopher Joseph Bueb , Olivier Duval
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Holland & Hart LLP
- Main IPC: G06F3/06
- IPC: G06F3/06 ; G06F9/455

Abstract:
Methods, systems, and devices for command prioritization techniques for reducing latency in a memory system are described. In some examples, a host system may receive a set of commands from one or more virtual machines to access a common memory system. The host system may store the set of command in a command queue associated with the memory system and arrange the set of command according to order that is based on one or more identified pattern of accessing sequential addresses in the set of commands. The host system may transmit the set of command to the memory system based on the order and the memory system may execute the commands according to the order.
Public/Granted literature
- US20230176776A1 COMMAND PRIORITIZATION TECHNIQUES FOR REDUCING LATENCY IN A MEMORY SYSTEM Public/Granted day:2023-06-08
Information query