Invention Grant
- Patent Title: Neural network accelerator using logarithmic-based arithmetic
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Application No.: US16549683Application Date: 2019-08-23
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Publication No.: US11886980B2Publication Date: 2024-01-30
- Inventor: William James Dally , Rangharajan Venkatesan , Brucek Kurdo Khailany
- Applicant: NVIDIA Corporation
- Applicant Address: US CA Santa Clara
- Assignee: NVIDIA Corporation
- Current Assignee: NVIDIA Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Leydig, Voit & Mayer, Ltd.
- Main IPC: G06N3/06
- IPC: G06N3/06 ; G06N3/063 ; G06F17/16 ; G06F7/483

Abstract:
Neural networks, in many cases, include convolution layers that are configured to perform many convolution operations that require multiplication and addition operations. Compared with performing multiplication on integer, fixed-point, or floating-point format values, performing multiplication on logarithmic format values is straightforward and energy efficient as the exponents are simply added. However, performing addition on logarithmic format values is more complex. Conventionally, addition is performed by converting the logarithmic format values to integers, computing the sum, and then converting the sum back into the logarithmic format. Instead, logarithmic format values may be added by decomposing the exponents into separate quotient and remainder components, sorting the quotient components based on the remainder components, summing the sorted quotient components to produce partial sums, and multiplying the partial sums by the remainder components to produce a sum. The sum may then be converted back into the logarithmic format.
Public/Granted literature
- US20210056397A1 NEURAL NETWORK ACCELERATOR USING LOGARITHMIC-BASED ARITHMETIC Public/Granted day:2021-02-25
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