Invention Grant
- Patent Title: Semiconductor die including stress-resistant bonding structures and methods of forming the same
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Application No.: US17412551Application Date: 2021-08-26
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Publication No.: US11887955B2Publication Date: 2024-01-30
- Inventor: Hui-Min Huang , Ming-Da Cheng , Chang-Jung Hsueh , Wei-Hung Lin , Kai Jun Zhan , Wan-Yu Chiang
- Applicant: Taiwan Semiconductor Manufacturing Company Limited
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Company Limited
- Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
- Current Assignee Address: TW Hsinchu
- Agency: The Marbury Law Group, PLLC
- Main IPC: H01L23/522
- IPC: H01L23/522 ; H01L23/00
Abstract:
A semiconductor die including mechanical-stress-resistant bump structures is provided. The semiconductor die includes dielectric material layers embedding metal interconnect structures, a connection pad-and-via structure, and a bump structure including a bump via portion and a bonding bump portion. The entirety of a bottom surface of the bump via portion is located within an area of a horizontal top surface of a pad portion of the connection pad-and-via structure.
Public/Granted literature
- US20230065797A1 SEMICONDUCTOR DIE INCLUDING STRESS-RESISTANT BONDING STRUCTURES AND METHODS OF FORMING THE SAME Public/Granted day:2023-03-02
Information query
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