Invention Grant
- Patent Title: Tuning capacitance to enhance FET stack voltage withstand
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Application No.: US17190122Application Date: 2021-03-02
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Publication No.: US11888468B2Publication Date: 2024-01-30
- Inventor: Robert Mark Englekirk
- Applicant: pSemi Corporation
- Applicant Address: US CA San Diego
- Assignee: pSemi Corporation
- Current Assignee: pSemi Corporation
- Current Assignee Address: US CA San Diego
- Agency: JAQUEZ LAND GREENHAUS & McFARLAND LLP
- Agent Alessandro Steinfl, Esq.
- The original application number of the division: US15829773 2017.12.01
- Main IPC: H03K17/687
- IPC: H03K17/687 ; H03K17/10 ; H03K17/693 ; H03K17/16 ; H01H11/00 ; H03K17/06

Abstract:
An RF switch to controllably withstand an applied RF voltage Vsw, or a method of fabricating such a switch, which includes a string of series-connected constituent FETs with a node of the string between each pair of adjacent FETs. The method includes controlling capacitances between different nodes of the string to effectively tune the string capacitively, which will reduce the variance in the RF switch voltage distributed across each constituent FET, thereby enhancing switch breakdown voltage. Capacitances are controlled, for example, by disposing capacitive features between nodes of the string, and/or by varying design parameters of different constituent FETs. For each node, a sum of products of each significant capacitor by a proportion of Vsw appearing across it may be controlled to approximately zero.
Public/Granted literature
- US20210258009A1 Tuning Capacitance to Enhance FET Stack Voltage Withstand Public/Granted day:2021-08-19
Information query
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