Invention Grant
- Patent Title: Background offset calibration of a high-speed analog signal comparator
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Application No.: US17683650Application Date: 2022-03-01
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Publication No.: US11888492B2Publication Date: 2024-01-30
- Inventor: Jianping Wen , John L. Melanson
- Applicant: CIRRUS LOGIC INTERNATIONAL SEMICONDUCTOR LTD.
- Applicant Address: GB Edinburgh
- Assignee: CIRRUS LOGIC, INC.
- Current Assignee: CIRRUS LOGIC, INC.
- Current Assignee Address: US TX Austin
- Agency: Mitch Harris, Atty at Law, LLC
- Agent Andrew M. Harris
- Main IPC: H03M1/06
- IPC: H03M1/06

Abstract:
A background offset calibration system for an analog signal comparator provides low offset without compromising tracking bandwidth. The comparator includes a preamplifier and a decision latch. A switching selectively couples outputs of an analog circuit to the inputs of the preamplifier stage. A state control logic alternatively operates the system in a first phase in which the analog circuit acquires an input signal while the comparator is calibrated, and a second phase in which a comparison is performed by the comparator. In the first phase, the switching circuit disconnects the outputs of the analog circuit from the preamplifier stage and applies a common mode reference to the inputs of the preamplifier. An offset correction circuit determines correction changes from a history of states of the decision latch across multiple sampling cycles. The offset correction circuit adjusts a threshold voltage of the decision latch by applying the correction changes.
Public/Granted literature
- US20230283286A1 BACKGROUND OFFSET CALIBRATION OF A HIGH-SPEED ANALOG SIGNAL COMPARATOR Public/Granted day:2023-09-07
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