- Patent Title: Synchronizing coprocessors using synchronization instructions to force a second coprocessor to wait until receiving an acknowledgement signal from a first coprocessor
-
Application No.: US17867832Application Date: 2022-07-19
-
Publication No.: US11892970B2Publication Date: 2024-02-06
- Inventor: Jing Wang , Jiaxin Shi , Hanlin Xie , Xiaozhang Gong
- Applicant: KUNLUNXIN TECHNOLOGY (BEIJING) COMPANY LIMITED
- Applicant Address: CN Beijing
- Assignee: KUNLUNXIN TECHNOLOGY (BEIJING) COMPANY
- Current Assignee: KUNLUNXIN TECHNOLOGY (BEIJING) COMPANY
- Current Assignee Address: CN Beijing
- Agency: Lippes Mathias LLP
- Priority: CN 2110819670.6 2021.07.20
- Main IPC: G06F9/52
- IPC: G06F9/52 ; G06F15/78

Abstract:
A method for data processing, a processor chip. The method includes: acquiring a first relationship instruction; executing at least one first computing instruction acquired before the first relationship instruction based on the first relationship instruction; and sending acknowledgment information based on the first relationship instruction in response to completing executing the at least one first computing instruction, to cause a second coprocessor receiving the acknowledgment information to revert to a state of acquiring a second computing instruction after the second relationship instruction acquired by a second coprocessor based on the acknowledgment information.
Public/Granted literature
- US20220350774A1 METHOD FOR DATA PROCESSING, PROCESSOR CHIP Public/Granted day:2022-11-03
Information query