Invention Grant
- Patent Title: Dual facing BSI image sensors with wafer level stacking
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Application No.: US17347001Application Date: 2021-06-14
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Publication No.: US11894408B2Publication Date: 2024-02-06
- Inventor: Ping-Yin Liu , Yeur-Luen Tu , Chia-Shiung Tsai , Xiaomeng Chen , Pin-Nan Tseng
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee Address: TW Hsin-Chu
- Agency: HAYNES AND BOONE, LLP
- The original application number of the division: US14039640 2013.09.27
- Main IPC: H01L27/146
- IPC: H01L27/146

Abstract:
A device includes two BSI image sensor elements and a third element. The third element is bonded in between the two BSI image sensor elements using element level stacking methods. Each of the BSI image sensor elements includes a substrate and a metal stack disposed over a first side of the substrate. The substrate of the BSI image sensor element includes a photodiode region for accumulating an image charge in response to radiation incident upon a second side of the substrate. The third element also includes a substrate and a metal stack disposed over a first side of the substrate. The metal stacks of the two BSI image sensor elements and the third element are electrically coupled.
Public/Granted literature
- US20210305292A1 Dual Facing BSI Image Sensors With Wafer Level Stacking Public/Granted day:2021-09-30
Information query
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