Invention Grant
- Patent Title: Bond pad structure for bonding improvement
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Application No.: US17590224Application Date: 2022-02-01
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Publication No.: US11894410B2Publication Date: 2024-02-06
- Inventor: Sin-Yao Huang , Ching-Chun Wang , Dun-Nian Yaung , Feng-Chi Hung , Ming-Tsong Wang , Shih Pei Chou
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Eschweiler & Potashnik, LLC
- The original application number of the division: US15088232 2016.04.01
- Main IPC: H01L27/146
- IPC: H01L27/146

Abstract:
Some embodiments relate an integrated circuit (IC) including a first substrate including a plurality of imaging devices. A second substrate is disposed under the first substrate and includes a plurality of logic devices. A first interconnect structure is disposed between the first substrate and the second substrate and electrically couples imaging devices within the first substrate to one another. A second interconnect structure is disposed between the first interconnect structure and the second substrate, and electrically couples logic devices within the second substrate to one another. A bond pad structure is coupled to a metal layer of the second interconnect structure and extends along inner sidewalls of both the first interconnect structure and the second interconnect structure. An oxide layer extends from above the first substrate to below a plurality of metal layers of the first interconnect structure, and lines inner sidewalls of the bond pad structure.
Public/Granted literature
- US20220157864A1 BOND PAD STRUCTURE FOR BONDING IMPROVEMENT Public/Granted day:2022-05-19
Information query
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