Invention Grant
- Patent Title: Integrated circuit device with source/drain barrier
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Application No.: US17397728Application Date: 2021-08-09
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Publication No.: US11894421B2Publication Date: 2024-02-06
- Inventor: Feng-Ching Chu , Wei-Yang Lee , Yen-Ming Chen , Feng-Cheng Yang
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.V
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.V
- Current Assignee Address: TW Hsinchu
- Agency: HAYNES AND BOONE, LLP
- Main IPC: H01L29/06
- IPC: H01L29/06 ; H01L29/66 ; H01L29/08 ; H01L21/02 ; H01L29/78 ; H01L21/306 ; H01L21/3065

Abstract:
Various examples of an integrated circuit device and a method for forming the device are disclosed herein. In an example, a method includes receiving a workpiece that includes a substrate, and a device fin extending above the substrate. The device fin includes a channel region. A portion of the device fin adjacent the channel region is etched, and the etching creates a source/drain recess and forms a dielectric barrier within the source/drain recess. The workpiece is cleaned such that a bottommost portion of the dielectric barrier remains within a bottommost portion of the source/drain recess. A source/drain feature is formed within the source/drain recess such that the bottommost portion of the dielectric barrier is disposed between the source/drain feature and a remainder of the device fin.
Public/Granted literature
- US20210376077A1 Integrated Circuit Device with Source/Drain Barrier Public/Granted day:2021-12-02
Information query
IPC分类: