- Patent Title: Timing precision maintenance with reduced power during system sleep
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Application No.: US17385536Application Date: 2021-07-26
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Publication No.: US11895588B2Publication Date: 2024-02-06
- Inventor: Brett Warneke , Gary Wayne Ng , Mark Alan Lemkin
- Applicant: Analog Devices, Inc.
- Applicant Address: US MA Wilmington
- Assignee: Analog Devices, Inc.
- Current Assignee: Analog Devices, Inc.
- Current Assignee Address: US MA Wilmington
- Agency: Schwegman Lundberg & Woessner, P.A.
- Main IPC: H04W52/02
- IPC: H04W52/02 ; H04J3/06 ; H04W56/00

Abstract:
Embodiments of the present disclosure provide systems and methods for maintaining timing precision in different operating modes of a device (e.g., a wireless node). A timing circuit may switch clock signals between two different modes (e.g., high power and low power) while preserving timing precision. In a high-power mode, the timing circuit may provide a high frequency clock signal, and in a lower-power mode, it may provide a low frequency clock signal. Moreover, the switching between the different clock signals may be synchronized to select edges of the low frequency clock signal.
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