Invention Grant
- Patent Title: Method for manufacturing semiconductor device
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Application No.: US17541817Application Date: 2021-12-03
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Publication No.: US11895830B2Publication Date: 2024-02-06
- Inventor: Chuan-Lin Hsiao
- Applicant: NANYA TECHNOLOGY CORPORATION
- Applicant Address: TW New Taipei
- Assignee: NANYA TECHNOLOGY CORPORATION
- Current Assignee: NANYA TECHNOLOGY CORPORATION
- Current Assignee Address: TW New Taipei
- Agent Xuan Zhang
- Main IPC: H10B12/00
- IPC: H10B12/00 ; H01L29/423 ; H01L29/40 ; H01L21/762

Abstract:
The present disclosure provides a method for manufacturing a semiconductor device having a buried wordline. The method includes forming a first recessed portion in a first dielectric layer in a substrate; forming a second recessed portion spaced apart from the first recessed portion and in the substrate; disposing a protection layer on the substrate to cover the second recessed portion; and disposing a second dielectric layer on the first dielectric layer.
Public/Granted literature
- US20230180466A1 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE Public/Granted day:2023-06-08
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