Invention Grant
- Patent Title: Resistive memory cell with switching layer comprising one or more dopants
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Application No.: US17855155Application Date: 2022-06-30
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Publication No.: US11895933B2Publication Date: 2024-02-06
- Inventor: Fa-Shen Jiang , Cheng-Yuan Tsai , Hai-Dang Trinh , Hsing-Lien Lin , Hsun-Chung Kuang , Bi-Shen Lee
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Eschweiler & Potashnik, LLC
- The original application number of the division: US16939455 2020.07.27
- Main IPC: H10N70/00
- IPC: H10N70/00 ; H10N70/20 ; H10B63/00

Abstract:
Various embodiments of the present disclosure are directed towards a method for forming an integrated chip, the method includes forming a bottom electrode over a substrate. A first switching layer is formed on the bottom electrode. The first switching layer comprises a dielectric material doped with a first dopant. A second switching layer is formed over the first switching layer. An atomic percentage of the first dopant in the second switching layer is less than an atomic percentage of the first dopant in the first switching layer. A top electrode is formed over the second switching layer.
Public/Granted literature
- US20220336739A1 RESISTIVE MEMORY CELL WITH SWITCHING LAYER COMPRISING ONE OR MORE DOPANTS Public/Granted day:2022-10-20
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