Invention Grant
- Patent Title: Partial block handling in a non-volatile memory device
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Application No.: US17739741Application Date: 2022-05-09
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Publication No.: US11901014B2Publication Date: 2024-02-13
- Inventor: Zhongguang Xu , Nicola Ciocchini , Zhenlei Shen , Charles See Yeung Kwong , Murong Lang , Ugo Russo , Niccolo' Righetti
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Lowenstein Sandler LLP
- Main IPC: G11C16/10
- IPC: G11C16/10 ; G11C16/34 ; G11C16/26 ; G11C16/08

Abstract:
A processing device in a memory sub-system initiates a partial block handling protocol for a closed block of a memory device, the block comprising a plurality of wordlines. The processing device further sends a first programming command to the memory device to program one or more wordlines of the block with first padding data having a first data pattern, wherein the one or more wordlines are adjacent to a last wordline of the block programmed before the block was closed. In addition, the processing device sends a second programming command to the memory device to program all of a set of remaining wordlines of the block with second padding data having a second data pattern comprising fewer bits of data per cell than the first data pattern.
Public/Granted literature
- US20230360704A1 PARTIAL BLOCK HANDLING IN A NON-VOLATILE MEMORY DEVICE Public/Granted day:2023-11-09
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