Invention Grant
- Patent Title: Manufacturing method of semiconductor package
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Application No.: US17506706Application Date: 2021-10-21
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Publication No.: US11901344B2Publication Date: 2024-02-13
- Inventor: Shing-Yih Shih
- Applicant: NANYA TECHNOLOGY CORPORATION
- Applicant Address: TW New Taipei
- Assignee: NANYA TECHNOLOGY CORPORATION
- Current Assignee: NANYA TECHNOLOGY CORPORATION
- Current Assignee Address: TW New Taipei
- Agency: JCIPRNET
- The original application number of the division: US16264711 2019.02.01
- Main IPC: H01L23/49
- IPC: H01L23/49 ; H01L25/10 ; H01L23/48 ; H01L23/31 ; H01L23/498 ; H01L25/00 ; H01L21/56 ; H01L21/48 ; H01L23/538

Abstract:
A manufacturing method of a semiconductor package is provided as follows. A semiconductor die is provided, wherein the semiconductor die comprises a semiconductor substrate, an interconnection layer and a through semiconductor via, the interconnection layer is disposed on an active surface of the semiconductor substrate, the through semiconductor via penetrates the semiconductor substrate from a back surface of the semiconductor substrate to the active surface of the semiconductor substrate. An encapsulant is provided to laterally encapsulate the semiconductor die. A through encapsulant via penetrating through the encapsulant is formed.
Information query
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