Invention Grant
- Patent Title: Method and apparatus of NR RMSI coreset configuration in MIB
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Application No.: US17933393Application Date: 2022-09-19
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Publication No.: US11902075B2Publication Date: 2024-02-13
- Inventor: Hongbo Si , Young-Han Nam , Youngbum Kim , Taehyoung Kim
- Applicant: SAMSUNG ELECTRONICS CO., LTD.
- Applicant Address: KR Suwon-si
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Suwon-si
- Main IPC: H04L5/00
- IPC: H04L5/00 ; H04L27/26 ; H04W56/00 ; H04W48/12 ; H04W72/0453 ; H04W88/08 ; H04W88/02 ; H04W72/20

Abstract:
Configuring control information comprises determining a frequency offset including an RB and RE level frequency offset, where the frequency offset is determined based on a lowest RE of an SS/PBCH block and a lowest RE of CORESET for RMSI, jointly configuring, using a first field of 4 bits, the RB level frequency offset with a multiplexing pattern of the SS/PBCH block and the CORESET, a BW of the CORESET, and a number of symbols for the CORESET for a combination of a SCS of the SS/PBCH block and a SCS of the CORESET, configuring using a second field of the 4 bits generating an MIB including the RB level frequency offset and the RE level frequency offset; and transmitting, to a UE, the MIB over a PBCH.
Public/Granted literature
- US20230023515A1 METHOD AND APPARATUS OF NR RMSI CORESET CONFIGURATION IN MIB Public/Granted day:2023-01-26
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