Invention Grant
- Patent Title: Analog-to-digital converter or digital-to-analog converter data path with deterministic latency
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Application No.: US17129889Application Date: 2020-12-21
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Publication No.: US11902132B2Publication Date: 2024-02-13
- Inventor: Dan Pritsker , Colman Cheung , Benjamin Esposito
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: InventIQ Legal LLP
- Agent Steven J. Cahill
- Main IPC: H04L43/0852
- IPC: H04L43/0852 ; G06F13/38 ; H03M1/66 ; H03M1/12

Abstract:
A circuit system includes an analog-to-digital converter circuit, a digital-to-analog converter circuit coupled to the analog-to-digital converter circuit, and a variable latency circuit coupled to a data path that includes the digital-to-analog converter circuit. The variable latency circuit generates a deterministic latency in an output signal that is based on a measured latency of the data path.
Public/Granted literature
- US20220038357A1 Analog-to-Digital Converter or Digital-to-Analog Converter Data Path with Deterministic Latency Public/Granted day:2022-02-03
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