Invention Grant
- Patent Title: Three-dimensional memory device and method
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Application No.: US17744212Application Date: 2022-05-13
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Publication No.: US11903216B2Publication Date: 2024-02-13
- Inventor: Feng-Cheng Yang , Meng-Han Lin , Sheng-Chen Wang , Han-Jong Chia , Chung-Te Lin
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Slater Matsil, LLP
- Main IPC: H10B51/20
- IPC: H10B51/20 ; H01L21/3213 ; H01L21/768 ; H01L23/522 ; H10B51/30

Abstract:
In accordance with embodiments, a memory array is formed with a multiple patterning process. In embodiments a first trench is formed within a multiple layer stack and a first conductive material is deposited into the first trench. After the depositing the first conductive material, a second trench is formed within the multiple layer stack, and a second conductive material is deposited into the second trench. The first conductive material and the second conductive material are etched.
Public/Granted literature
- US20220278130A1 Three-Dimensional Memory Device and Method Public/Granted day:2022-09-01
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