Invention Grant
- Patent Title: Adaptive block mapping
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Application No.: US17750131Application Date: 2022-05-20
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Publication No.: US11922069B2Publication Date: 2024-03-05
- Inventor: Alberto Sassara , Giuseppe D'Eliseo , Lalla Fatima Drissi , Luigi Esposito , Paolo Papa , Salvatore Del Prete , Xiangang Luo , Xiaolai Zhu
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Holland & Hart LLP
- Main IPC: G06F3/06
- IPC: G06F3/06

Abstract:
Methods, systems, and devices for adaptive block mapping are described. In some examples, a first superblock and a second superblock may be established across one or more dice of a memory device. The superblocks may each include one or more blocks from a plurality of planes of a memory die. In some examples, the second superblock may include at least one bad block (e.g., defective block) in addition to one or more good blocks (e.g., non-defective blocks). The memory device may receive a command for writing data in a first mode and may write a first subset of the data to the first superblock in the first mode, a second subset of the data to the second superblock in the first mode, and one or more blocks associated with the second superblock in a second mode. Additionally or alternatively, the memory device may receive a second command for writing data in the second mode and may write the data to the first superblock in the first mode.
Public/Granted literature
- US20230376245A1 ADAPTIVE BLOCK MAPPING Public/Granted day:2023-11-23
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