Invention Grant
- Patent Title: Via connection to wiring in a semiconductor device
-
Application No.: US17007626Application Date: 2020-08-31
-
Publication No.: US11923291B2Publication Date: 2024-03-05
- Inventor: Atsushi Kato
- Applicant: Kioxia Corporation
- Applicant Address: JP Tokyo
- Assignee: KIOXIA CORPORATION
- Current Assignee: KIOXIA CORPORATION
- Current Assignee Address: JP Tokyo
- Agency: Foley & Lardner LLP
- Priority: JP 20029592 2020.02.25
- Main IPC: H01L23/522
- IPC: H01L23/522 ; H01L21/768 ; H01L23/00

Abstract:
A semiconductor device includes a first substrate, a logical circuit, a first insulating film, a wiring, a plug, and a first layer containing a metal oxide or a metal nitride. The logical circuit is disposed on the first substrate. The first insulating film is disposed above the logical circuit. The wiring includes a first film disposed in the first insulating film, the first film extending in a first direction along an upper surface of the first substrate, and the first film containing a metal, and a first metal layer disposed in the first insulating film via the first film. The plug is disposed under the wiring, extends in a second direction that intersects the first direction, and is electrically connected to the wiring. The first layer is provided between an upper end of the plug and a bottom end of the wiring.
Public/Granted literature
- US20210265265A1 SEMICONDUCTOR DEVICE Public/Granted day:2021-08-26
Information query
IPC分类: