Invention Grant
- Patent Title: Transistor isolation regions and methods of forming the same
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Application No.: US17371351Application Date: 2021-07-09
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Publication No.: US11923366B2Publication Date: 2024-03-05
- Inventor: Po-Kang Ho , Tsai-Yu Huang , Huicheng Chang , Yee-Chia Yeo
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Slater Matsil, LLP
- Main IPC: H01L27/092
- IPC: H01L27/092 ; H01L21/8234 ; H01L29/06 ; H01L29/66 ; H01L29/78

Abstract:
In an embodiment, a device includes: a first semiconductor fin extending from a substrate; a second semiconductor fin extending from the substrate; a hybrid fin over the substrate, the second semiconductor fin disposed between the first semiconductor fin and the hybrid fin; a first isolation region between the first semiconductor fin and the second semiconductor fin; and a second isolation region between the second semiconductor fin and the hybrid fin, a top surface of the second isolation region disposed further from the substrate than a top surface of the first isolation region.
Public/Granted literature
- US20220359517A1 Transistor Isolation Regions and Methods of Forming the Same Public/Granted day:2022-11-10
Information query
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