Invention Grant
- Patent Title: High electron mobility transistor with doped semiconductor region in gate structure
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Application No.: US17563329Application Date: 2021-12-28
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Publication No.: US11929430B2Publication Date: 2024-03-12
- Inventor: Thomas Detzel , Gerhard Prechtl , Oliver Haeberlen
- Applicant: Infineon Technologies Austria AG
- Applicant Address: AT Villach
- Assignee: Infineon Technologies Austria AG
- Current Assignee: Infineon Technologies Austria AG
- Current Assignee Address: AT Villach
- Agency: Murphy, Bilak & Homiller, PLLC
- The original application number of the division: US16774126 2020.01.28
- Main IPC: H01L29/778
- IPC: H01L29/778 ; H01L21/02 ; H01L29/10 ; H01L29/20 ; H01L29/205 ; H01L29/40 ; H01L29/417 ; H01L29/423 ; H01L29/66

Abstract:
A method includes providing a semiconductor body including a plurality of two-dimensional charge carrier gas channels, forming a gate fin by forming a pair of gate trenches in an upper surface of the semiconductor body, the pair of gate trenches exposing each one of two-dimensional charge carrier gas channels, providing source and drain contacts that are electrically connected to each one of the plurality of two-dimensional charge carrier gas channels, providing a gate structure that is configured to control a conductive connection between the source and drain contacts, wherein providing the gate structure includes forming a layer of doped type III-nitride semiconductor material that covers the gate fin and extends into the gate trenches, and forming a conductive gate electrode on top of the layer of doped type III-nitride semiconductor material.
Public/Granted literature
- US20220123138A1 High Electron Mobility Transistor with Doped Semiconductor Region in Gate Structure Public/Granted day:2022-04-21
Information query
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