Invention Grant
- Patent Title: Techniques in hybrid regulators of high power supply rejection ratio and conversion efficiency
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Application No.: US17100603Application Date: 2020-11-20
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Publication No.: US11940824B2Publication Date: 2024-03-26
- Inventor: Xiaosen Liu , Harish Krishnamurthy , Krishnan Ravichandran , Vivek De , Scott Chiu , Claudia Patricia Barrera Gonzalez , Jing Han , Rajasekhara Madhusudan Narayana Bhatla
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwabe, Williamson & Wyatt, P.C.
- The original application number of the division: US16450873 2019.06.24
- Main IPC: G05F1/56
- IPC: G05F1/56 ; G05F1/46 ; G05F1/67

Abstract:
Embodiments of the present disclosure describe methods, apparatuses, and systems for hybrid low dropout regulator (LDO) architecture and realization to provide high power supply rejection ratio (PSRR) and high conversion efficiency (CE), and other benefits. The hybrid LDO may be coupled with dual rails for its analog LDO branch and digital LDO respectively to achieve high PSRR and high CE by utilizing the hybrid architecture with several feedback loops. Other embodiments may be described and claimed.
Public/Granted literature
- US20210103308A1 TECHNIQUES IN HYBRID REGULATORS OF HIGH POWER SUPPLY REJECTION RATIO AND CONVERSION EFFICIENCY Public/Granted day:2021-04-08
Information query
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