Invention Grant
- Patent Title: Error correction code validation
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Application No.: US17726123Application Date: 2022-04-21
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Publication No.: US11940872B2Publication Date: 2024-03-26
- Inventor: Shaun Stephen Bradley , Bernard Sherwin Leung Chiw , Andreas G Callanan , Thomas J. Meany , Pat Crowe
- Applicant: Analog Devices International Unlimited Company
- Applicant Address: IE Limerick
- Assignee: Analog Devices International Unlimited Company
- Current Assignee: Analog Devices International Unlimited Company
- Current Assignee Address: IE Limerick
- Agency: Schwegman Lundberg & Woessner, P.A.
- Main IPC: H03M13/00
- IPC: H03M13/00 ; G06F11/10 ; G11C29/52

Abstract:
A memory device comprising a memory array including memory cells to store memory data, error correcting code (ECC) circuitry configured to generate ECC data and use the ECC data to detect errors in the memory data, and an ECC circuitry checker. The ECC circuitry checker is configured to substitute the ECC data with check ECC data, compare an output of the ECC circuitry to an expected output when the substituted check ECC data is applied to the ECC circuitry, and generate an alert when the comparing indicates an error in the ECC circuitry.
Public/Granted literature
- US20230342242A1 ERROR CORRECTION CODE VALIDATION Public/Granted day:2023-10-26
Information query
IPC分类: