Invention Grant
- Patent Title: Integrated circuit package and method
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Application No.: US17980914Application Date: 2022-11-04
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Publication No.: US11942403B2Publication Date: 2024-03-26
- Inventor: Chih-Chien Pan , Li-Hui Cheng , Chin-Fu Kao , Szu-Wei Lu
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Slater Matsil, LLP
- Main IPC: H01L23/498
- IPC: H01L23/498 ; H01L21/304 ; H01L21/306 ; H01L21/56 ; H01L21/78 ; H01L23/00 ; H01L23/31 ; H01L25/065

Abstract:
In an embodiment, a package includes: an interposer having a first side; a first integrated circuit device attached to the first side of the interposer; a second integrated circuit device attached to the first side of the interposer; an underfill disposed beneath the first integrated circuit device and the second integrated circuit device; and an encapsulant disposed around the first integrated circuit device and the second integrated circuit device, a first portion of the encapsulant extending through the underfill, the first portion of the encapsulant physically disposed between the first integrated circuit device and the second integrated circuit device, the first portion of the encapsulant being planar with edges of the underfill and edges of the first and second integrated circuit devices.
Public/Granted literature
- US20230052821A1 Integrated Circuit Package and Method Public/Granted day:2023-02-16
Information query
IPC分类: