Invention Grant
- Patent Title: Multi-die debug stop clock trigger
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Application No.: US17880507Application Date: 2022-08-03
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Publication No.: US11946969B2Publication Date: 2024-04-02
- Inventor: Charles J. Fleckenstein , Tal Lazmi , Ori Isachar
- Applicant: Apple Inc.
- Applicant Address: US CA Cupertino
- Assignee: Apple Inc.
- Current Assignee: Apple Inc.
- Current Assignee Address: US CA Cupertino
- Agency: Kowert, Hood, Munyon, Rankin & Goetzel, P.C.
- Agent Robert C. Kowert
- Main IPC: G01R31/28
- IPC: G01R31/28 ; G01R31/317 ; G01R31/3183 ; G01R31/319

Abstract:
Systems, apparatuses, and methods for implementing a multi-die clock stop trigger are described. A computing system includes a plurality of semiconductor dies connected together and sharing a global clock stop trigger signal which is pulled high via a resistor tied to a supply voltage. Each semiconductor die has a clock generation unit which generates local clocks for the die. Each clock generation unit monitors for local clock stop triggers, and if one of the local triggers is detected, the clock generation unit stops local clocks on the die and pulls the global clock stop trigger signal low. When the other clock generation units on the other semiconductor dies detect the global clock stop trigger at the logic low level, these clock generation units also stop their local clocks. Captured data is then retrieved from the computing system for further analysis.
Public/Granted literature
- US20230025207A1 Multi-Die Debug Stop Clock Trigger Public/Granted day:2023-01-26
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