Invention Grant
- Patent Title: Low stress asymmetric dual side module
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Application No.: US17929884Application Date: 2022-09-06
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Publication No.: US11948870B2Publication Date: 2024-04-02
- Inventor: Chee Hiong Chew , Atapol Prajuckamol , Stephen St. Germain , Yusheng Lin
- Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
- Applicant Address: US AZ Phoenix
- Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
- Current Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
- Current Assignee Address: US AZ Scottsdale
- Agency: Adam R. Stephenson, LTD.
- Main IPC: H01L23/40
- IPC: H01L23/40 ; H01L23/00 ; H01L23/367 ; H01L23/495 ; H01L25/065

Abstract:
Implementations of semiconductor packages may include a first substrate having two or more die coupled to a first side, a clip coupled to each of the two or more die on the first substrate and a second substrate having two or more die coupled to a first side of the second substrate. A clip may be coupled to each of the two or more die on the second substrate. The package may include a lead frame between the first substrate and the second substrate and a molding compound. A second side of each of the first substrate and the second substrate may be exposed through the molding compound. A perimeter of the first substrate and a perimeter of the second substrate may not fully overlap when coupled through the lead frame.
Public/Granted literature
- US20220415766A1 LOW STRESS ASYMMETRIC DUAL SIDE MODULE Public/Granted day:2022-12-29
Information query
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