Invention Grant
- Patent Title: Semiconductor device having a plurality of terminals arranged thereon
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Application No.: US17507271Application Date: 2021-10-21
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Publication No.: US11948916B2Publication Date: 2024-04-02
- Inventor: Shuuichi Kariyazaki
- Applicant: RENESAS ELECTRONICS CORPORATION
- Applicant Address: JP Tokyo
- Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee Address: JP Tokyo
- Agency: Rimon, P.C.
- Priority: JP 20180995 2020.10.29
- Main IPC: H01L25/065
- IPC: H01L25/065 ; H01L23/00 ; H01L23/498 ; H01L23/538

Abstract:
The electronic device includes a first semiconductor device having a logic circuit, a second semiconductor device having a memory circuit, and a wiring substrate to which the first and second semiconductor devices are mounted. The first semiconductor device has a plurality of terminals arranged on a main surface. The plurality of terminals includes a plurality of differential pair terminals electrically connected to the second semiconductor device and to which differential signals are transmitted. The plurality of differential pair terminals is arranged along a side of the main surface, that is extending in an X direction, and includes a first differential pair terminal constituted by a pair of terminals arranged along a Y direction orthogonal to the X direction, and a second differential pair terminal constituted by a pair of terminals arranged along the Y direction. The first and second differential pair terminals are arranged along the Y direction.
Public/Granted literature
- US20220139877A1 ELECTRONIC DEVICE AND SEMICONDUCTOR DEVICE Public/Granted day:2022-05-05
Information query
IPC分类: