Output impedance and load independent latch-off timer for voltage-limit mode protection
Abstract:
One example includes a power supply system. The system includes a voltage-limit power regulator to generate an output voltage and an instantaneous overvoltage sensor configured to detect an overvoltage condition associated with the output voltage. The system further includes an overvoltage latch-off timer system configured to initiate a latch-off timer in response to detecting the overvoltage condition. The latch-off timer can be uninterrupted by an amplitude of the output voltage. The overvoltage latch-off timer system can further be configured to detect a persistent overvoltage fault in response to detecting the overvoltage condition after expiration of the latch-off timer. The overvoltage latch-off timer system can be configured to generate a fault signal to disable the voltage-limit power regulator in response to detecting the persistent overvoltage fault.
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