• Patent Title: Peripheral component interconnect express device error reporting optimization method and system capable of filtering error reporting messages
  • Application No.: US17987872
    Application Date: 2022-11-16
  • Publication No.: US11953975B2
    Publication Date: 2024-04-09
  • Inventor: Chi-Feng Yu
  • Applicant: Wiwynn Corporation
  • Applicant Address: TW New Taipei
  • Assignee: Wiwynn Corporation
  • Current Assignee: Wiwynn Corporation
  • Current Assignee Address: TW New Taipei
  • Agent Winston Hsu
  • Priority: TW 1130637 2022.08.15
  • Main IPC: G06F11/07
  • IPC: G06F11/07 G06F11/32 G06F13/40
Peripheral component interconnect express device error reporting optimization method and system capable of filtering error reporting messages
Abstract:
A peripheral component interconnect express (PCIe) device error reporting optimization method includes acquiring advanced error reporting data of a PCIe device, executing a removal detection process of the PCIe device for detecting if the PCIe device is plugged into a connector, transmitting error log data of the PCIe device to a baseboard management controller and an advanced configuration and power interface according to the advanced error reporting data if the PCIe device is plugged into the connector, and filtering the error log data of the PCIe device so that filtered error log data is received by the baseboard management controller and the advanced configuration and power interface if the PCIe device and the connector are electrically disconnected.
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