Invention Grant
- Patent Title: Efficient evict for cache block memory
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Application No.: US17305991Application Date: 2021-07-19
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Publication No.: US11954038B2Publication Date: 2024-04-09
- Inventor: Olof Henrik Uhrenholt , Håkan Lars-Göran Persson , Jakob Axel Fries
- Applicant: Arm Limited
- Applicant Address: GB Cambridge
- Assignee: Arm Limited
- Current Assignee: Arm Limited
- Current Assignee Address: GB Cambridge
- Agency: Vierra Magen Marcus LLP
- Priority: GB 11446 2020.07.23
- Main IPC: G06F12/0888
- IPC: G06F12/0888 ; G06T1/20 ; G06T1/60 ; G06T9/00

Abstract:
A data processing system includes a memory system, a processor and a cache system. The cache system includes a cache and a data encoder associated with the cache. The data encoder encodes blocks of uncompressed data having a particular data size for storing in the memory system. The processor is configured, when an array of data has a data size equal to the particular data size or is able to be combined with one or more other arrays of data already written to the cache to provide a plurality of arrays of data having a data size that is equal to the particular data size, to output the array of data from the processor to the data encoder, bypassing the cache, for encoding as or as part of a block of data having the particular data size.
Public/Granted literature
- US20220027281A1 DATA PROCESSING SYSTEMS Public/Granted day:2022-01-27
Information query
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