Invention Grant
- Patent Title: Dielectric fill for tight pitch MRAM pillar array
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Application No.: US17541401Application Date: 2021-12-03
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Publication No.: US11955152B2Publication Date: 2024-04-09
- Inventor: Ashim Dutta , Chih-Chao Yang , Theodorus E. Standaert , Daniel Charles Edelstein
- Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Applicant Address: US NY Armonk
- Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee Address: US NY Armonk
- Agency: Tutunjian & Bitetto, P.C.
- Agent L. Jeffrey Kelly
- Main IPC: G11C11/16
- IPC: G11C11/16 ; H10B61/00 ; H10N50/01 ; H10N50/10 ; H10N50/80 ; H10N50/85

Abstract:
A semiconductor device includes a bottom electrode contact disposed over one or more of a plurality of conductive lines, magnetoresistive random access memory (MRAM) pillars constructed over the bottom electrode contact, an encapsulation layer section disposed between a pair of the MRAM pillars such that an aspect ratio of a tight pitch gap between the pair of the MRAM pillars is reduced, and a dielectric disposed within the encapsulation layer section, wherein the dielectric fills an entirety of a space defined within the encapsulation layer section. The MRAM pillars have a generally rectangular-shaped or cone-shaped configuration and the encapsulation layer section has a generally U-shaped or V-shaped configuration.
Public/Granted literature
- US20230178129A1 DIELECTRIC FILL FOR TIGHT PITCH MRAM PILLAR ARRAY Public/Granted day:2023-06-08
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