Invention Grant
- Patent Title: Power delivery reduction scheme for SoC
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Application No.: US17676665Application Date: 2022-02-21
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Publication No.: US11960341B2Publication Date: 2024-04-16
- Inventor: Jamie L. Langlinais , Inder M. Sodhi , Lior Zimet , Keith Cox
- Applicant: Apple Inc.
- Applicant Address: US CA Cupertino
- Assignee: Apple Inc.
- Current Assignee: Apple Inc.
- Current Assignee Address: US CA Cupertino
- Agency: Kowert, Hood, Munyon, Rankin & Goetzel, P.C.
- Agent Gareth M. Sampson; Dean M. Munyon
- Main IPC: G06F1/3206
- IPC: G06F1/3206 ; G06F1/3228 ; G06F1/324 ; G06F1/3293 ; G06F1/3296

Abstract:
Various techniques and circuit implementations for power reduction management in integrated circuits are disclosed. Different sets of power delivery trigger circuits may be coupled to the integrated circuit by wiring or serial communication interfaces. Power reduction responses may be implemented at faster rates utilizing the wired power delivery trigger circuits while slower power reduction response can be implemented utilizing serially connected power delivery trigger circuits. The threshold for power reduction response by wired power delivery trigger circuits may also be closer to a functional failure point of the integrated circuit in order to provide fast response to avoid failure of the integrated circuit.
Public/Granted literature
- US20230069344A1 Power Delivery Reduction Scheme for SoC Public/Granted day:2023-03-02
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