Invention Grant
- Patent Title: Resistive memory device with boundary and edge transistors coupled to edge bit lines
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Application No.: US17827851Application Date: 2022-05-30
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Publication No.: US11961555B2Publication Date: 2024-04-16
- Inventor: Makoto Hirano
- Applicant: SAMSUNG ELECTRONICS CO., LTD.
- Applicant Address: KR Suwon-si
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR
- Agency: Fish & Richardson P.C.
- Priority: KR 20190161668 2019.12.06
- The original application number of the division: US17014480 2020.09.08
- Main IPC: G11C13/00
- IPC: G11C13/00

Abstract:
A resistive memory device includes a first bit line group including a first edge bit line, a second bit line group including a second edge bit line, and a first boundary transistor configured to apply a non-selection voltage to the second edge bit line according to a selection of the first edge bit line. The first edge bit line of the first bit line group is disposed closest to the second bit line group, and the second edge bit line of the second bit line group is disposed closest to the first bit line group.
Public/Granted literature
- US20220293172A1 RESISTIVE MEMORY DEVICE WITH BOUNDARY AND EDGE TRANSISTORS COUPLED TO EDGE BIT LINES Public/Granted day:2022-09-15
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