Invention Grant
- Patent Title: Systems for reducing inconsistencies across current mirror
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Application No.: US17844207Application Date: 2022-06-20
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Publication No.: US11967355B2Publication Date: 2024-04-23
- Inventor: Wei Lu Chu , Dong Pan
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Fletcher Yoder, P.C.
- Main IPC: G11C11/4074
- IPC: G11C11/4074 ; G11C11/4076

Abstract:
A device includes source circuitry comprising a first portion of a current mirror and a first transistor. The device also includes load circuitry comprising a second portion of the current mirror and a second transistor, wherein the load circuitry is disposed at a distance from the source circuitry. The device further includes a path coupled to a first gate of the first transistor and to a second gate of the second transistor, wherein the path provides a predetermined voltage to both of the first gate of the first transistor and to the second gate of the second transistor.
Public/Granted literature
- US20230410877A1 SYSTEMS FOR REDUCING INCONSISTENCIES ACROSS CURRENT MIRROR Public/Granted day:2023-12-21
Information query
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